The present invention relates to the field of semiconductor processing, and more particularly, to the formation of metallic gate electrodes using the replacement gate process technique.
In the integrated circuit (IC) industry, metal-oxide-semiconductor (MOS) transistors have typically been formed utilizing polysilicon gate electrodes. Polysilicon material has been preferred for use as an MOS gate electrode due to its thermal resistive properties (i.e., polysilicon can better withstand subsequent high temperature processing). Polysilicon""s robustness during high temperature processing allows polysilicon to be annealed at high temperatures along with source and drain regions. Furthermore, polysilicon""s ability to block the ion implantation of doped atoms into a channel region is advantageous. Due to the ion implantation blocking potential of polysilicon, polysilicon allows for the easy formation of self-aligned source and drain structures after gate patterning is completed.
However, polysilicon gate electrodes have certain disadvantages. For example, polysilicon gate electrodes are formed from semiconductor materials that suffer from higher resistivities than most metal materials. Therefore, polysilicon gate electrodes may operate at much slower speeds than gates made of metallic materials. To partially compensate for this higher resistance, polysilicon materials often require extensive and expensive silicide processing in order to increase their speed of operation to acceptable levels.
A need exists in the industry for a metal gate device which can replace a polysilicon gate device. However, metal gates can not withstand the higher temperatures and oxidation ambients which can be withstood by conventional polysilicon gate electrodes. In efforts to avoid some of the concerns with polysilicon gate electrodes, a replacement damascene metal gate process has been created. A damascene gate process uses a disposable gate, which is formed with a source, drain, spacer, etch stops and anti-reflective coatings as in conventional processing. The disposable gate and dielectrics are etched away, exposing an original gate oxide. The disposable polysilicon gate is then replaced by a metal gate to achieve the lower resistivity provided by the metal material.
A design consideration in semiconductor technology is that of the work function, which is the amount of energy required to excite electrons across a threshold. Polysilicon gates on silicon substrates provide a work function that allows the gates to be adequately controlled. The use of metal, however, as the gate material on a silicon substrate undesirably changes the work function in comparison to polysilicon gates. This reduces the controllability of the gate.
There is a need for a semiconductor structure and arrangement for making the same in which the gate is made of a metal, but the work function is substantially the same as a semiconductor structure which contains a polysilicon gate.
This and other needs are met by the embodiments of the present invention which provide a semiconductor structure comprising a substrate, active regions in the substrate, and a gate structure on the substrate. This gate structure includes a high dielectric constant (high k) gate dielectric on the substrate, a physical vapor deposited (PVD) layer of amorphous silicon on the high k gate dielectric, implanted dopants in the PVD amorphous silicon layer, and metal silicide on the doped PVD amorphous silicon layer.
By providing a semiconductor structure having a gate structure with a PVD layer of amorphous silicon and metal silicide on the PVD amorphous silicon layer, the advantages of a metal gate, including that of lower resistivity, is achieved without compromising the work function of the gate structure. Hence, the PVD amorphous silicon layer causes the work function of the metal gate to appear like a standard gate. Also, a PVD amorphous silicon layer is less resistive than conventionally formed CVD amorphous silicon, which makes the gate structure as a whole less resistive. Furthermore, the implantation of additional dopants into the PVD amorphous silicon layer lowers the resistivity of the PVD amorphous silicon layer even more. This lowers the resistivity of the gate electrode as a whole, having a desirable effect on speed and power consumption of the device.
The earlier stated needs are also met by embodiments of the present invention that provide a method of forming a semiconductor structure, comprising the steps of forming a precursor having a substrate with active regions separated by a channel, and a temporary gate over the channel and between dielectric structures. The temporary gate is removed to form a recess with a bottom and sidewalls between the dielectric structures. Amorphous silicon is deposited in the recess by physical vapor deposition. Dopants are implanted into the PVD amorphous silicon. The metal is then deposited in the recess on the doped PVD amorphous silicon.
The formation of a semiconductor structure in accordance with the present invention is advantageous in that high-temperature processes may be performed prior to the deposition of the metal gate. Also, the formation of source and drain electrodes self-aligned to the subsequently formed metal gate is possible. The formation of the metal gate in this replacement gate process, however, allows the metal gate to be formed after the implantation of the dopant atoms. By depositing amorphous silicon in the recess by physical vapor deposition prior to the depositing of the metal in the recess on the amorphous silicon, the work function will be same as if the gate were made of polysilicon instead of metal. This provides increased control of the gate and avoids leakage. The implantation of dopants provides a relatively precise control of the doping level and the resistivity of the PVD amorphous silicon layer.